This invention relates to a method of arranging devices on a logic circuit board and more particularly to a method of arranging devices which is suitable to arrange the devices, considering signal propagation delay time in a high-speed electronic logic circuit.
In the fabrication of an electronic circuit such as an integrated circuit, first, a logic data defining logic circuit devices and the interconnections among them is made, and thereafter on the basis of the logic data, these logic circuit devices are arranged on a logic circuit board and the wiring of signal lines connecting these circuit devices is made.
In determining the arrangement of logic circuit devices, it has been the conventional practice that the circuit devices are arranged with the total length of wiring made as short as possible in order to make the area required to arrange necessary circuit devices on a circuit board as small as possible, i.e., to reduce the chip size of an integrated circuit. However, in such a conventional method of arranging the circuit devices the signal propagation delay time among the circuit devices is not considered in the stage of arranging them, which entails such a disadvantage as to require subsequent manual change of the arrangement of the devices.